000			00624nam a22002177a 4500
003			IIT(BHU) Varanasi
005			20260903150703.0
008			260903b |||||||| |||| 00| 0 eng d
020			_a0-07-0667241
040			_aIIT-BHU _beng _cSDL
041			_aeng
100			_aBrown, Stephen _eaut
245			_aFundamentals of digital logic design with verilog design _cStephen Brown and Zvonko Vranesic
250			_a2nd ed
260			_aNew Delhi _bTata McGraw Hill _c2007
300			_axviii, 865p
500			_aInclude index
650			_aDigital logic design
700			_aVranesic, Zvonko _eaut
942			_2ddc _cBK
999			_c76795 _d76795